About SiTime

SiTime Corporation is the precision timing company. Our semiconductor MEMS programmable solutions offer a rich feature set that enables customers to differentiate their products with higher performance, smaller size, lower power and better reliability. With more than 3 billion devices shipped, SiTime is changing the timing industry. For more information, visit www.sitime.com.

 

Job Summary

The Senior Principal Analog Mixed-Signal Design Engineer contributes to building precision timing circuits, leveraging SiTime’s industry-leading MEMS technology. These products have applications ranging from high-performance Networking and Communications Infrastructure to ultra-low power Mobile platforms, including wearable devices. 

It is not necessary to meet all job requirements to be a qualified candidate for the position. 

 

Responsibilities:

Contribute to the architectural definition of the design and chip integrationTechnical leader for chip level design and verification simulations to ensure building blocks meet specifications at the schematic level and after post-layout extraction, while fully provisioning for DFT and DFMWork closely with Layout Engineers to validate proper layout, using all best-known methodsDocument assigned blocks, and hold preliminary and final design review meetingsActively participate in the chip bring-up, evaluation and characterization, with emphasis on owned blocksWork cross-functionally with Product, Characterization, Test, and Application Engineers on issues related to owned circuit blocksCoach, mentor and develop junior/mid-level analog designers, foster cross-functional collaboration.

 

Qualifications & Requirements:

M.S. in Electrical Engineering or related field with minimum 15 years of related experience, or Ph.D. in Electrical Engineering with minimum 12 years of related experienceExcellent academic record with published research projects prototyped and proven in silicon Detailed knowledge of CMOS circuits and noise analysisCore expertise in one of the following areas:Integer-N and fractional-N PLL Sigma-Delta ADCsTemperature sensorAnalog and digital filtersQuartz or MEMS oscillatorSub-threshold circuitsLow noise regulator and bandgapHigh-speed output driversAbility to oversee circuit layout for critical blocksKnowledge of programming languages: MATLAB, VerilogAProficient in using Cadence analog design toolsGood facilitation skill for project/design review meeting Excellent analytical, problem-solving, written/verbal communication. Proven leadership and ability to collaborate across system architects, digital teams, layout, test, manufacturing

 

Desired Characteristics & Attributes:

Passionate, self-starter with a strong commitment to flawless executionExcellent written and verbal communication skills requiredAbility to work well with others in a fast-paced collaborative team environment

 

In addition to base salary, this role is eligible for a quarterly bonus tied to the achievement of innovation goals—reflecting our commitment to recognizing meaningful impact. We also offer equity grants, providing a meaningful opportunity to share in the company’s future growth and success.

 

SiTime is an Equal Opportunity Employer. We treat each person fairly and we do not tolerate discrimination or harassment against anyone on the basis of any protected characteristics, including race, color, religion, national or ethnic origin, sex, sexual orientation, gender identity or expression, age, disability, pregnancy, political affiliation, protected veteran status, protected genetic information, or marital status or other characteristics protected by law.

 

Learn More about SiTime: Review the Get to Know SiTime section of our career page to explore our culture, values, and what makes us unique. 

Innovation on Top – Philosophies of Innovation with Rajesh VashistFabrication Knowledge – An Interview with Rajesh VashistSiTime Corporation – YouTube